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 XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! Synchronous step-down DC/DC converter
with built-in LDO regulator plus voltage detector
February 2, 2004 V5
! Step-down DC/DC converter's output connected in parallel
with LDO regulator
! ! ! !
SOP-8 package for high current Small-footprint Output Current (DC/DC : 800mA, VR : 400mA) Ceramic capacitor compatible (Low ESR capacitors)
! APPLICATIONS " CD-R / RW, DVD " HDD " PDAs, portable communication modem " Cellular phones " Palmtop computers " Cameras, video recorders
! GENERAL DESCRIPTION
The XC9511 series consists of a step-down DC/DC converter and a high-speed LDO regulator connected in parallel with the DC/DC converter's output. A voltage detector is also built-in. Since the input for the LDO voltage regulator block comes from the input power supply, it is suited for use with various applications. The DC/DC converter block incorporates a P-Channel driver transistor and a synchronous N-Channel switching transistor. With an external coil, diode and two capacitors, the XC9511 can deliver output currents up to 800mA at efficiencies over 90%. The XC9511 is designed for use with small ceramic capacitors. A choice of three switching frequencies are available, 300 kHz, 600 kHz, and 1.2 MHz. Output voltage settings for the DC/DC and VR are set-up internally in 100mV steps within the range of 0.9V to 4.0V ( 2.0%). For the VD, the range is of 0.9V to 5.0V ( 2.0%). The soft start time of the series is internally set to 5ms. With the builtin U.V.L.O. (Under Voltage Lock Out) function, the internal P-channel driver transistor is forced OFF when input voltage becomes 1.4 V or lower.
! FEATURES
Input Voltage Range : Load Capacitors : 2.4V ~ 6.0V Ceramic Capacitor Compatible (Low ESR Capacitors) VD Function : Detects output voltage from the VDOUT pin while sensing either VDD, DCOUT, or VROUT internally. Nch Open Drain Output

Output Voltage Range : 0.9V ~ 4.0V (Accuracy 2%) Output Current : Controls : 800mA PWM Control PWM, PWM / PFM Automatic Switching External
Oscillation Frequency : 300kHz, 600kHz, 1.2MHz

Output Voltage Range : 0.9V ~ 4.0V (Accuracy 2%) Current Limit Dropout Voltage : High Ripple Rejection 600mA 160mV @ IOUT=200mA (VOUT=2.8V) 60dB @1kHz (VOUT=2.8V)
! TYPICAL APPLICATION CIRCUIT
! TYPICAL PERFORMANCE CHARACTERISTICS
XC9511Axxxx
VIN=5.0V, Topr=25OC, L:4.7uH(CDRH4D28C) CIN:4.7uF(ceramic), CL1:10uF(ceramic), CL2:1uF(ceramic)
L 1 2 3 + CIN1 + CIN2 4 VDOUT AGND 5 PGND PVDD AVDD LX DCOUT VROUT 8 7
DCOUT
100 90 80
VROUT 6 + C L2 + C L1
Efficiency EFFI (%)
70 60 50 40 30 20 10 0 0.1 1 10 100 1000 DC/DC Efficiency (DCOUT:3.3V, 1.2MHz)
()
SD
SOP-8 (TOP VIEW)
DC/DC Output Current IDOUT
Semiconductor Ltd.
Data Sheet
1
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! PIN CONFIGURATION ! PIN ASSIGNMENT
PIN NUMBER
PGND 1 PVDD 2 AVDD 3 VDOUT 4 8 LX 7 DCOUT 6 VROUT 5 AGND
PIN NAME PGND PVDD AVDD VDOUT AGND VROUT DCOUT LX
FUNCTION Power Ground Power Supply 1 Power Supply 2 VD Output Analog Ground VR Output DC/DC Output Switch
1 2 3 4 5 6 7 8
SOP-8 (TOP VIEW)
! SELECTION GUIDE
" Ordering Information XC9511
123456
SYMBOL
The input for the voltage regulator block comes from VDD. DESCRIPTION
DESIGNATOR
1 23 4 5 6
3 6 C S
Control Methods and the VD Sense pin (See the chart below) Setting voltage and specifications of each DC/DC, VR, and VD (Based on the internal standard) Oscillation Frequency of DC/DC : 300kHz 600kHz 1.2MHz Package Type : SOP-8 Device Orientation :
R L
Embossed Tape : Standard feed Embossed Tape : Reverse feed
# Control Methods and VD SENSE Pin
SERIES
1
A B
DC/DC CONTROL METHODS
VD SENSE VDD
PWM Control
DCOUT VROUT
XC9511
C D E F PFM/PWM Automatic Switch
VDD DCOUT VROUT
Semiconductor Ltd.
Data Sheet
2
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! PACKAGING INFORMATION
# SOP-8
! BLOCK DIAGRAM
DCOUT
PVDD
Phase Compensation
+ + logic Buffer, Driver
Vref with soft start
PWM/PFM Controller
Current Limit & Feedback R amp Wave Generator, OSC
L X
AVDD
PGND
U.V.L.O + Current Li mi t
VROUT
VDOUT
+ Vref SENSE (VDD or DCOUT or VROUT)
+ Vref
AGND
* Diodes shown in the above circuits are protective diodes.
! ABSOLUTE MAXIMUM RATINGS
Ta=25OC PARAMETER AVDD Pin Voltage PVDD pin Voltage DCOUT Pin Voltage VROUT Pin Voltage VROUT Pin Current VDOUT Pin Voltage VDOUT Pin Current LX Pin Voltage LX Pin Current SOP-8 Continuous Power Dissipation (*) Operating Temperature Range Storage Temperature Range (*) When PC board mounted. SYMBOL AVDD PVDD DCOUT VROUT IROUT VDOUT IVD LX ILX Pd Topr Tstg RATINGS - 0.3 ~ 6.5 AVDD - 0.3 ~ AVDD + 0.3 - 0.3 ~ AVDD + 0.3 - 0.3 ~ AVDD + 0.3 800 - 0.3 ~ AVDD + 0.3 50 - 0.3 ~ AVDD + 0.3 + 1300 650 - 40 ~ + 85 - 55 ~ + 125 UNITS V V V V mA V mA V mA mW O C O C
Semiconductor Ltd.
Data Sheet
3
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! ELECTRICAL CHARACTERISTICS
XC9511xxxCSx
# Common Characteristics PARAMETER Supply Current 1 Supply Current 2 Input Voltage Range # DC/DC Converter (1.5V product) PARAMETER Output Voltage Oscillation Frequency Maximum Duty Ratio Minimum Duty Ratio PFM Duty Ratio *XC9511D/E/F U.V.L.O Voltage (note 1) LX SW 'High' ON Resistance (note 2) LX SW 'Low' ON Resistance LX SW 'High' Leak Current (note 11) LX SW 'Low' Leak Current (note 11) Maximum Output Current Current Limit (note 8) Efficiency (note 3) Output Voltage Temperature Characteristics Soft Start Time Latch Time (note 4, 9) SYMBOL DCOUT(E) FOSC MAXDUTY MINDUTY PFMDUTY VUVLO RLXH RLXL IleakH IleakL IMAX1 ILIM1 EFFI ! DCOUT
(!Topr"DCOUT)
Topr=25OC SYMBOL IDD1 IDD2 VIN CONDITIONS VIN=CE=DCOUT=5.0V VIN=CE=5.0V, DCOUT=0V MIN. 2.4 TYP. 250 300 MAX. 310 360 6.0 UNITS V
TEST CIRCUIT
1 1 -
CONDITIONS Connected to the external components, IDOUT=30mA Connected to the external components, IDOUT=10mA DCOUT=0V DCOUT=VIN Connected to the external components, No Load Connected to the external components DCOUT=0V, LX=VIN-0.05V Connected to the external components, VIN=5.0V VIN=LX=6.0V, CE=0V VIN=6.0V, LX=CE=0V Connected to the external components Connected to the external components, IDOUT=100mA IDOUT=30mA -40OCMIN. 1.470 1.02 100 21 1.00 800 1.0 -
TYP. 1.500 1.20 30 1.40 0.5 0.5 0.05 0.05 1.1 90 100 5 8
MAX. 1.530 1.38 0 38 1.78 1.0 0.9 1.00 1.00 -
UNITS V MHz % % % V A A mA A % ppm/OC mS mS
TEST CIRCUIT
3 3 4 4 3 3 5 3 11 11 3 6 3 3 3 10
2 -
10 25
TSS Tlat
# Regulator (3.3V product) PARAMETER Output Voltage Maximum Output Current Load Regulation Dropout Voltage 1 (note 5) Dropout Voltage 2 Line Regulation Current Limit Short-Circuit Current Ripple Rejection Rate Output Voltage Temperature Characteristics SYMBOL VROUT(E) IMAX2 ! VROUT Vdif 1 Vdif 2 ! VROUT
(!VIN"VROUT)
Topr=25OC CONDITIONS IROUT=30mA 1mATEST CIRCUIT
2 2 2 2 2 2 7 7 12 2
ILIM2 ISHORT PSRR ! VROUT
(!Topr"VROUT)
Semiconductor Ltd.
Data Sheet
4
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! ELECTRICAL CHARACTERISTICS (Continued)
# Detector (2.7V product) PARAMETER Detect Voltage Hysteresis Range VD Output Current Output Voltage Temperature Characteristics Test Conditions : SYMBOL VDF(E) VHYS IVD ! VDF
(! Topr " VDF)
Topr=25OC CONDITIONS CE=0V VHYS=[VDR(E) (note 10) - VDF(E)] VDF(E) x 100 VDOUT=0.5V, CE=0V CE=0V, -40OCTEST CIRCUIT
8 8 9 8
-
-
Unless otherwise stated; DC/DC : VIN=3.6V [@ DCOUT:1.5V] VR : VIN = 4.3V (VIN=VROUT(T) + 1.0V) VD : VIN=6.0V Common conditions for all test items : CE=VIN, MODE=0V * VROUT(T) : Setting Output Voltage
note 1: Including hysteresis operating voltage range. note 2: ON resistance ()= 0.05 (V) / ILX (A) note 3: EFFI = { ( Output Voltage x Output Current ) / ( Input Voltage x Input Current) } x 100 note 4: Time until it short-circuits DCOUT with GND through 1 of resistance from a state of operation and is set to DCOUT=0V from current limit pulse generating. note 5: Vdif = (VIN1 (note 6) - VROUT1 (note 7 ) ) note 6: VIN 1 = The input voltage when VROUT1 appears as input voltage is gradually decreased. note 7: VROUT1 = A voltage equal to 98% of the output voltage whenever an amply stabilized IOUT {VROUT(T) + 1.0V} is input. note 8: Current limit = When VIN is low, limit current may not be reached because of voltage falls caused by ON resistance or serial resistance of coils. note 9: Integral latch circuit=latch time may become longer and latch operation may not work when VIN is 3.0V or more. note 10 : VDR(E) = VD release voltage note 11 : When temperature is high, a current of approximately 5.0A (maximum) may leak. note 12 : When using the IC with a regulator output at almost no load, a capacitor should be placed as close as possible between AVDD and AGND (CIN2), connected with low impedance. Please also see the recommended pattern layout on page 13 for your reference. Should it not be possible to place the input capacitor nearby, the regulated output level may increase up to the VDD level while the load of the DC/DC converter increases and the regulator output is at almost no load.
Semiconductor Ltd.
Data Sheet
5
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! TEST CIRCUITS
Circuit 1 Supply Current Circuit 2 Output Voltage (VR), Load Regulation, Dropout Voltage, Maximum Output Current
1 2 3
PGND PVDD AVDD VDOUT
LX DCOUT VROUT AGND
8 DCOUT : VIN or GND 7 6 5
1 2 3 4
PGND PVDD AVDD VDOUT
LX DCOUT VROUT AGND
8 7 6 5
A
4
V
V
IROUT
CIN : 1.0uF (ceramic)
CIN : 4.7uF (ceramic)
CL:1.0uF(ceramic, 2.2uF(ceramic,
VROUT 1.5V) VROUT<1.5V)
Circuit
3
Output Voltage (DC/DC), Oscillation Frequency, U.V.L.O. Voltage, Soft start Time Maximum Output Current, Efficiency, (PFM Duty Cycle)
Probe 1 2 PGND PVDD AVDD VDOUT LX DCOUT VROUT AGND 8 L 7 6 5
Circuit
4
Minimum Duty Cycle, Maximum Duty Cycle
Probe 1 2 3 PGND PVDD AVDD VDOUT LX DCOUT VROUT AGND 8 7 6 5 200
A
3 4
V
IDOUT
4
V
V
CIN 1 2: 4.7uF (ceramic) Fosc 300kHz 600kHz 1.2MHz
CL:10uF (ceramic) L 22uH(CDRH6D38, SUMIDA) 10uH(CDRH5D28, SUMIDA) 4.7uH(CDRH4D28C, SUMIDA)
CIN : 1.0uF (ceramic)
Circuit
5
Lx ON Resistance
Circuit
6
Current Limit 1 (DC/DC)
Probe
1 2 3 4
PGND PVDD AVDD VDOUT
LX DCOUT VROUT AGND
8 7 6 5
A
1 2 3 4
PGND PVDD AVDD VDOUT
LX DCOUT VROUT AGND
8 7 6 5
A
ILX
V
CIN : 1.0uF (ceramic)
CIN : 4.7uF (ceramic)
Semiconductor Ltd.
Data Sheet
6
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! TEST CIRCUITS (Continued)
Circuit 7 Current Limit 2 (VR), Short Current (VR) Circuit 8 Detect Voltage, Release Voltage (Hysteresis Range)
1 2 3 4
PGND PVDD AVDD VDOUT
LX DCOUT VROUT AGND
8 7 6 5
VD_SENSE * (DCOUT or VROUT) 1 2 PGND PVDD AVDD VDOUT LX DCOUT VROUT AGND 8 7 6 5
A
200k
3 4
V
V
V
V
CIN : 4.7uF (ceramic)
CL: 1.0uF (ceramic)
CIN : 1uF (ceramic)
CL : 1.0uF (ceramic, VROUT>1.5V) 2.2uF (ceramic, VROUT<1.5V)
* For the measurement of the VDD_Sense products, the input voltage was controlled.
Circuit
9
VD Output Current
Circuit
10
Latch Time
VD_SENSE* (DCOUT or VROUT) 1 2 3 PGND PVDD AVDD VDOUT LX DCOUT VROUT AGND 8 7 6 5
1 2 3 4 PGND PVDD AVDD VDOUT LX DCOUT VROUT AGND 8 7 6 5
L
A V
4
V
1
V
CIN :1uF (ceramic)
CIN : 4.7uF (ceramic) Fosc 300kHz 600kHz 1.2MHz
CL:10uF (ceramic) L 22uH(CDRH6D38,
* For the measurement of the VDD_Sense products, the input voltage was controlled.
SUMIDA)
10uH(CDRH5D28, SUMIDA) 4.7uH(CDRH4D28C, SUMIDA)
Circuit
11
Off-Leak
Circuit
12
Ripple Rejection Rate
1 2 3 4
PGND PVDD AVDD VDOUT
LX DCOUT VROUT AGND
8 7 6 5
A
1 2 3 4
PGND PVDD AVDD VDOUT
LX DCOUT VROUT AGND
8 7 6 5
V
~
V
V
IROUT
CIN : 1.0uF (ceramic)
CIN : 4.7uF (ceramic) CL:1.0uF(ceramic, 2.2uF(ceramic, VROUT >1.5V) VROUT<1.5V)
Semiconductor Ltd.
Data Sheet
7
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! TYPICAL APPLICATION CIRCUIT
L 1 2 3 + CIN1 + CIN2 4 VDOUT AGND 5 PGND PVDD AVDD LX DCOUT VROUT 8 7 VROUT 6 + C L2 + C L1
DCOUT
FOSC 1.2MHz 600kHz 300kHz
L 4.7H (CDRH4D28C, SUMIDA) 10H (CDRH5D28, SUMIDA) 22H (CDRH6D28, SUMIDA)
SD : XB0ASB03A1BR (TOREX)
()
SD
CIN CL1 CL2
: 4.7F x 2 (ceramic, TAIYO-YUDEN) : 10F (ceramic, TAIYO-YUDEN) : 1F (ceramic, TAIYO-YUDEN), VROUT>1.5V
SOP-8 (TOP VIEW)
: 2.2F (ceramic, TAIYO-YUDEN), VROUT<1.5V The DC/DC converter of the XC9511 series automatically switches between synchronous / non-synchronous. The Schottky diode is not normally needed. However, in cases where high efficiency is required when using the DC/DC converter during light load while in nonsynchronous operation, please connect a Schottky diode externally.
! OPERATIONAL EXPLANATION
The XC9511 series consists of a synchronous step-down DC/DC converter, a high speed LDO voltage regulator, and a voltage detector.
# DC/DC Converter
The series consists of a reference voltage source, ramp wave circuit, error amplifier, PWM comparator, phase compensation circuit, output voltage adjustment resistors, driver transistor, synchronous switch, current limiter circuit, U.V.L.O. circuit and others. The series ICs compare, using the error amplifier, the voltage of the internal voltage reference source with the feedback voltage from the VOUT pin through split resistors. Phase compensation is performed on the resulting error amplifier output, to input a signal to the PWM comparator to determine the turn-on time during PWM operation. The PWM comparator compares, in terms of voltage level, the signal from the error amplifier with the ramp wave from the ramp wave circuit, and delivers the resulting output to the buffer driver circuit to cause the Lx pin to output a switching duty cycle. This process is continuously performed to ensure stable output voltage. The current feedback circuit monitors the P-channel MOS driver transistor current for each switching operation, and modulates the error amplifier output signal to provide multiple feedback signals. This enables a stable feedback loop even when a low ESR capacitor, such as a ceramic capacitor, is used, ensuring stable output voltage. < Reference Voltage Source > The reference voltage source provides the reference voltage to ensure stable output voltage of the DC/DC converter. < Ramp Wave Circuit > The ramp wave circuit determines switching frequency. The frequency is fixed internally and can be selected from 300kHz, 600 kHz and 1.2 MHz. Clock pulses generated in this circuit are used to produce ramp waveforms needed for PWM operation, and to synchronize all the internal circuits. < Error Amplifier > The error amplifier is designed to monitor output voltage. The amplifier compares the reference voltage with the feedback voltage divided by the internal split resistors. When a voltage lower than the reference voltage is fed back, the output voltage of the error amplifier increases. The gain and frequency characteristics of the error amplifier output are fixed internally to deliver an optimized signal to the mixer. < PWM/PFM > The XC9511A to C series are PWM control, while the XC9511D to F series can be automatically switched to PWM/PFM control. The PWM mode of the XC9511A to C series are controlled on a specified frequency from light loads through to heavy loads. Since the frequency is specified, the composition of a noise filter etc. becomes easy. However, the efficiency at the time of the light load may become low. The XC9511D to F series can switch to PWM/PFM automatic switching control. With the automatic PWM/PFM switching control function, the series ICs are automatically switched from PWM control to PFM control mode under light load conditions. The series can not control only PFM mode. If during light load conditions the coil current becomes discontinuous and on-time rate falls lower than 30%, the PFM circuit operates to output a pulse with 30% of a fixed on-time rate from the Lx pin. During PFM operation with this fixed on-time rate, pulses are generated at different frequencies according to conditions of the moment. This causes a reduction in the number of switching operations per unit of time, resulting in efficiency improvement under light load conditions. However, since pulse output frequency is not constant, consideration should be given if a noise filter or the like is needed. Necessary conditions for switching to PFM operation depend on input voltage, load current, coil value and other factors.
Semiconductor Ltd.
Data Sheet
8
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! OPERATIONAL EXPLANATION (Continued)
< Synchronous / Non-synchronous > The XC9511 series automatically switches between synchronous / non-synchronous according to the state of the DC/DC converter. Highly efficient operations are achievable using the synchronous mode while the coil current is in a continuous state. The series enters non-synchronous operation when the built-in Nch switching transistor for synchronous operation is shutdown which happens when the load current becomes low and the operation changes to a discontinuous state. The IC can operate without an external schottky diode because the parasitic diode in the Nch switching transistor provides the circuit's stepdown operation. However, since Vf of the parasitic diode is a high 0.6V, the efficiency level during non-synchronous operation shows a slight decrease. Please use an external Schottky diode if high efficiency is required during light load current.
# Continuous Mode : Synchronous
ILmax
# Discontinuous Mode : Non-Synchronous
Coil Current ILmin Coil Current 0mA
ILmax
0mA
LX W ave Form
LX W ave Form
< Current Limit > The current limiter circuit of the XC9511 series monitors the current flowing through the P-channel MOS driver transistor connected to the Lx pin, and features a combination of the constant-current type current limit mode and the operation suspension mode. 1 When the driver current is greater than a specific level, the constant-current type current limit function operates to turn off the pulses from the Lx pin at any given timing. 2 When the driver transistor is turned off, the limiter circuit is then released from the current limit detection state. 3 At the next pulse, the driver transistor is turned on. However, the transistor is immediately turned off in the case of an over current state. 4 When the over current state is eliminated, the IC resumes its normal operation. The IC waits for the over current state to end by repeating the steps 1 through 3 . If an over current state continues for 8msec* and the above three steps are repeatedly performed, the IC performs the function of latching the OFF state of the driver transistor, and goes into operation suspension mode. Once the IC is in suspension mode, operations can be resumed by either turning the IC off via the CE pin, or by restoring power to the VIN pin. The suspension mode does not mean a complete shutdown, but a state in which pulse output is suspended; therefore, the internal circuitry remains in operation. The constant-current type current limit of the XC9511 series can be set at 1.1A. .
Limit<8mS
*
Limit>8mS
*
Current Limit LEVEL IDOUT 0mA DCOUT VSS LX
CE
Restart
VIN *1.2MHz, Typical
Semiconductor Ltd.
Data Sheet
9
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! OPERATIONAL EXPLANATION (Continued)
< U.V.L.O. Circuit> When the VIN pin voltage becomes 1.4 V or lower, the P-channel output driver transistor is forced OFF to prevent false pulse output caused by unstable operation of the internal circuitry. When the VIN pin voltage becomes 1.8 V or higher, switching operation takes place. By releasing the U.V.L.O. function, the IC performs the soft start function to initiate output startup operation. The soft start function operates even when the VIN pin voltage falls momentarily below the U.V.L.O. operating voltage. The U.V.L.O. circuit does not cause a complete shutdown of the IC, but causes pulse output to be suspended; therefore, the internal circuitry remains in operation.
# High Speed LDO Voltage Regulator
The voltage regulator block of the XC9511 series consists of a reference voltage source, error amplifier, and current limiter circuit. The voltage divided by split resistors is compared with the internal reference voltage by the error amplifier. The P-Channel MOSFET, which is connected to the VROUT pin, is then driven by the subsequent output signal. The output voltage at the VROUT pin is controlled and stabilized by a system of negative feedback. A stable output voltage is achievable even if used with low ESR capacitors as a phase compensation circuit is built-in. < Reference Voltage Source > The reference voltage source provides the reference voltage to ensure stable output voltage of the regulator. < Error Amplifier > The error amplifier compares the reference voltage with the signal from VROUT, and the amplifier controls the output of the Pch driver transistor. The voltage regulator block includes a combination of a constant current limiter circuit and a foldback circuit. The voltage regulator senses output current of the built-in P channel output driver transistor inside. When the load current reaches the current limit level, the current limiter circuit operates and the output voltage of the voltage regulator block drops. As a result of this drop in output voltage, the foldback circuit operates, output voltage drops further and the load current decreases. When the VROUT and GND pin are shorted, the load current of about 30mA flows.
# Voltage Detector
The detector block of the XC9511 series detects output voltage from the VDOUT pin while sensing either VDD, DCOUT, or VROUT internally. (N channel Open Drain Type)
Semiconductor Ltd.
Data Sheet
10
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! NOTES ON USE
" Application Information
1. The XC9511 series is designed for use with a ceramic output capacitor. If, however, the potential difference between dropout voltage or output current is too large, a ceramic capacitor may fail to absorb the resulting high switching energy and oscillation could occur on the output. If the input-output potential difference is large, connect an electrolytic capacitor in parallel to compensate for insufficient capacitance. 2. Spike noise and ripple voltage arise in a switching regulator as with a DC/DC converter. These are greatly influenced by external component selection, such as the coil inductance, capacitance values, and board layout of external components. Once the design has been completed, verification with actual components should be done. 3. When the difference between VIN and VOUT is large in PWM control, very narrow pulses will be outputted, and there is the possibility that some cycles may be skipped completely. 4. When the difference between VIN and VOUT is small, and the load current is heavy, very wide pulses will be outputted and there is the possibility that some cycles may be skipped completely: in this case, the Lx pin may not go low at all.
# DC/DC Waveform (3.3V, 1.2MHz)
CH1:LX
CH1:LX
CH2:DCOUT Off-set Voltage:3.3V
CH2:DCOUT Off-set Voltage:3.3V
VIN=3.7V, IDOUT=100mA L: 4.7H (CDRH4D28C, SUMIDA) CIN: 4.7F (ceramic) CL: 10F (ceramic)
VIN=3.5V, IDOUT=100mA L: 4.7H (CDRH4D28C, SUMIDA) CIN: 4.7F (ceramic) CL: 10F (ceramic)
5. The IC's DC/DC converter operates in synchronous mode when the coil current is in a continuous state and non-synchronous mode when the coil current is in a discontinuous state. In order to maintain the load current value when synchronous switches to non-synchronous and vise versa, a ripple voltage may increase because of the repetition of switching between synchronous and non-synchronous. When this state continues, the increase in the ripple voltage stops. To reduce the ripple voltage, please increase the load capacitance value or use a schottky diode externally. When the current used becomes close to the value of the load current when synchronous switches to nonsynchronous and vise versa, the switching current value can be changed by changing the coil inductance value. In case changes to coil inductance are to values other than the recommended coil inductance values, verification with actual components should be done.
Ics=
(VIN - DCOUT) x OnDuty / (L x Fosc) Ics : Switching current from synchronous rectification to non-synchronous rectification OnDuty : OnDuty ratio of P-ch driver transistor ( L : Coil inductance value Fosc : Oscillation Frequency IDOUT : The DC/DC load current step down ratio : DCOUT / VIN)
Semiconductor Ltd.
Data Sheet
11
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! NOTES ON USE (Continued)
" Application Information (Continued)
6. When the XC9511D to F series operate in PWM/PFM automatic switching control mode, the reverse current may become quite high around the load current value when synchronous switches to non-synchronous and vise versa (also refer to no. 5 above). Under this condition, switching synchronous rectification and non-synchronous rectification may be repeated because of the reverse current, and the ripple voltage may be increased to 100mV or more. The reverse current is the current that flows in the PGND direction through the Nch driver transistor from the coil. The conditions which cause this operation are as follows. PFM Duty < Step down ratio = DCOUT / VIN x 100 (%) PFM Duty : 30% (TYP.) The XC9511A to C series are recommended in cases where the load current value of the DC/DC converter is close to synchronous.
# DC/DC Waveform (1.8V, 600kHz) @ VIN=6.0V
CH1:LX
CH2:DCOUT Off-set Voltage:1.8V
VIN=6.0V, IDOUT=50mA L: 10H (CDRH5D28, SUMIDA) CIN: 4.7F (ceramic) CL: 10F (ceramic) Step down ratio : 1.8V / 6.0V =30% 7. With the DC/DC converter of the IC, the peak current of the coil is controlled by the current limit circuit. Since the peak current increases when dropout voltage or load current is high, current limit starts operating, and this can lead to instability. When peak current becomes high, please adjust the coil inductance value and fully check the circuit operation. In addition, please calculate the peak current according to the following formula: Peak current : Ipk = (VIN - DCOUT) x OnDuty / (2 x L x Fosc) + IDOUT 8. When the peak current which exceeds limit current flows within the specified time, the built-in driver transistor is turned off (the integral latch circuit). During the time until it detects limit current and before the built-in transistor can be turned off, the current for limit current flows; therefore, care must be taken when selecting the rating for the coil or the Schottky diode. 9. When VIN is low, limit current may not be reached because of voltage falls caused by ON resistance or serial resistance of the coil. 10. In the integral latch circuit, latch time may become longer and latch operation may not work when VIN is 3.0V or more. 11. Use of the IC at voltages below the recommended voltage range may lead to instability. 12. This IC and the external components should be used within the stated absolute maximum ratings in order to prevent damage to the device. 13. When using IC with a regulator output at almost no load, a capacitor should be placed as close as possible between AVDD and AGND (CIN2), connected with low impedance. Please also see the recommended pattern layout on page 13 for your reference. Should it not be possible to place the input capacitor nearby, the regulated output level may increase up to the VDD level while the load of the DC/DC converter increases and the regulator output is at almost no load.
Semiconductor Ltd.
Data Sheet
12
XC9511 Series
Synchronous Step-Down DC/DC Converter with built-in LDO Regulator in parallel plus Voltage Detector Preliminary ! NOTES ON USE (Continued)
" Application Information (Continued)
14. Should the bi-directional load current of the synchronous DC/DC converter and the regulator become large, please be careful of the power dissipation when in use. Please calculate power dissipation by using the following formula. Pd=PdDC/DC + PdVR DC/DC power dissipation (when in synchronous operation) : VR power dissipation : PDVR = (VIN - VROUT) x IROUT PdDC/DC = IDOUT2 x RON
VIN DC/DC IDOUT (mA) VROUT (V) VR IROUT (mA) DCOUT (V)
RON: ON resistance of the built-in driver transistor to the DC/DC ( = 0.5 ) RON=Rpon x PchOnDuty / 100 + Rnon x (1 - PchOnDuty / 100)
# Instructions on Pattern Layout
1. In order to stabilize VIN's voltage level, we recommend that a by-pass capacitor (CIN) be connected as close as possible to the AVDD & AGND pins. Should it not be possible to place the input capacitors nearby, the regulated output level may increase because of the switching noise of the DC/DC converter. 2. Please mount each external component as close to the IC as possible. 3. Wire external components as close to the IC as possible and use thick, short connecting traces to reduce the circuit impedance. 4. Make sure that the PCB GND traces are as thick as possible, as variations in ground potential caused by high ground currents at the time of switching may result in instability of the DC/DC converter and have adverse influence on the regulator output. 5. If using a Schottky diode, please connect the anode side to the AGND pin through CIN. Characteristic degradation caused by the noise may occur depending on the arrangement of the Schottky diode. 6. Please use the AVDD and PVDD pins with the same electric potential.

CL1
LX PVDD VDOUT
+ +
VROUT DCOUT
IC
+
AGND
CL2 CIN2
CIN1
AVDD ( Through Hole to CIN1 )
( Through Hole to SD )
PGND
SD
L
Semiconductor Ltd.
Data Sheet
13


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